The present invention relates to apparatus and methods for switching on power to a load and, more particularly, a high power direct current (DC) solid state power converter (SSPC) that is adapted to turn on large capacitive loads while minimizing peak inrush current.
When a DC SSPC is turned on to a large capacitive load, the peak inrush current can be very high. This is particularly true for SSPC's used in a high voltage DC primary power distribution system, where large energy storage components are connected to the DC power bus, and when multiple downstream SSPC channels are turned on simultaneously during power-up process. The excessive high inrush current could result in stress in electrical components during power-up, therefore reducing their operational life, potential electric hazards, and electromagnetic interference (EMI) issues.
In order to bypass this inrush current without causing the SSPC to trip, the instantaneous trip level of the SSPC has to be set higher than the peak of the inrush current. This means the SSPC has to be designed to be capable of handling even higher fault current, which puts more stringent requirements on the solid state switching device (SSSD) of the SSPC designs.
A conventional high power DC SSPC suitable for aircraft primary electric power distribution applications is shown in FIG. 1. The SSPC 100 may include a SSSD 102 for main bus power switching, an electromechanical contactor 104 for allowing the use of normally on semiconductors for the SSSD and the safe operation of the SSPC, two power bus current sensors 106, 108, a DSP based SSPC control engine 110, and a control power supply 112, providing necessary control power for the DSP based SSPC control circuitry, the SSSD gate drive, and contactor coil drive. The two power bus current sensors 106, 108 may be used to facilitate SSPC functions and differential current sensing required for primary bus power controls and management.
A conventional method for avoiding such high inrush current is to apply a pulse width modulated (PWM) drive to the SSPC turn-on process, or to repeatedly allow the SSPC to trip when its instantaneous current trip level has been reached and then to be turned back on again by sensing its rising output voltage, thereby gradually ramping up the load side voltage. Unfortunately, this technique may not work if full load current is present in addition to the potential excessive switching loss on the SSPC while attempting to charge the large capacitance ranging, e.g., from 500 μF to 1000 μF. The full load current may rapidly discharge the capacitor during the SSPC's off time. Unless the SSPC's off time is less than the on time, which is dependent on SSPC's instantaneous trip level and cannot be arbitrarily chosen, the capacitor will not charge up completely.
Another approach is through current limiting (either straight active current limiting or PWM based) in which the SSPC supplies a constant current on average, well in excess of its rating but below its instantaneous trip level, to turn on the capacitive load. With current limiting techniques, excessive power dissipation occurs on the solid state switching device (SSSD) of the SSPC during the current limiting process, which drives the size, weight and cost of the SSPC designs when the load capacitance becomes significantly large.
A foldback current limiting technique has been proposed for a DC SSPC implementation which actively controls the current supplied by the SSPC during turn-on to capacitive loads, making it inversely proportional to the voltage across the SSSD. Although this method ensures the maximum energy will be supplied to the capacitive load without violating the safe operating area (SOA) of the SSSD, there is no guarantee it will charge up an excessively large capacitive load with full load current present.
As can be seen, there is a need to provide a practical, reliable, and cost effective method that allows a DC SSPC, particularly a high power DC SSPC in an aircraft high voltage DC (e.g. 270 VDC) electric power architecture, to turn-on to large capacitive loads without causing excessive inrush currents for improved system reliability, safety, and EMI.